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The RISC-V Reader is a concise introduction and reference for embedded systems programmers, students, and the curious to a modern, popular, open architecture. RISC-V spans from the cheapest 32-bit embedded microcontroller to the fastest 64-bit cloud computer. The text shows how RISC-V followed the good ideas of past architectures while avoiding their mistake. Highlights include: Introduces the RISC-V instruction set in only 100 pages, including 75 figures An Instruction Translator Guide to help translate assembly language programs from ARM-32 and x86-32 instruction sets to RISC-V 2-page RISC-V Reference Card that summarizes all instructions 50-page Instruction Glossary that defines every instruction in detail 75 spotlights of good architecture design using margin icons 50 sidebars with interesting commentary and RISC-V history 25 quotes to pass along wisdom of noted scientists and engineers Ten chapters introduce each component of the modular RISC-V instruction set--often contrasting code compiled from C to RISC-V versus the older ARM, Intel, and MIPS architectures--but readers can start programming after Chapter 2. Praise for The RISC-V Reader: “This timely book concisely describes the simple, free and open RISC-V ISA that is experiencing rapid uptake in many different computing sectors.” Krste Asanovic, University of California, Berkeley, one of the four architects of RISC-V “I like RISC-V and this book as they are elegant—brief, to the point, and complete.” C. Gordon Bell, a computer architecture pioneer “ This handy little book effortlessly summarizes all the essential elements of the RISC-V Instruction Set Architecture, a perfect reference guide for students and practitioners alike.” Professor Randy Katz, University of California, Berkeley, one of the inventors of RAID storage systems “This clearly-written book offers a good introduction to RISC-V, augmented with insightful comments on its evolutionary history and comparisons with other familiar architectures.” John Mashey, one of the designers of the MIPS architecture “This book tells what RISC-V can do and why its designers chose to endow it with those abilities.” Ivan Sutherland, the father of computer graphics “RISC-V will change the world, and this book will help you become part of that change.” Professor Michael B. Taylor, University of Washington “This book will be an invaluable reference for anyone working with the RISC-V ISA.” Megan Wachs, PhD, SiFive Engineer
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David A. Patterson, né le 16 novembre 1947 à Evergreen Park, est un scientifique américain, professeur émérite de l'université de Californie à Berkeley en génie électrique et informatique. Lui The RISC-V Reader: An Open Architecture Atlas et John Hennessy sont les co-lauréats du prix Turing 2017 pour avoir été les pionniers d'une approche systématique et quantitative de la conception et de l'évaluation d'architectures informatiques ayant un impact durable sur l'industrie des microprocesseurs[1].
The RISC-V Reader: An Open Architecture Atlas
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